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32 entries may sound small by modern standards (current x86 processors have thousands of TLB entries), but it covers 128 KB of memory -- enough for the working set of most 1980s programs. A TLB miss is not catastrophic either; the hardware page walker handles it transparently in about 20 cycles.
His committee's new inquiry will examine how much energy and water data centres are likely to use, and how this could impact the government's net zero goals.